1. Field of the Invention
The present invention generally relates to integrated circuits. More particularly, the present invention provides a method and apparatus for optimizing the burn-in of integrated circuits.
2. Related Art
Burn-in is a testing procedure that employs elevated voltage and temperature levels to accelerate the electrical failure of integrated circuits. Burn-in may be used as a reliability monitor and/or as a production screen to weed out potential mortalities from an integrated circuit lot.
During the burn-in of an integrated circuit, there is a limit on the overall power dissipation because of the ability to cool and supply power to the integrated circuit. Burn-in power dissipation is exponential with regard to voltage and temperature, so that dropping the voltage or temperature to meet power supply specifications and avoid thermal runaway greatly extends burn-in time. As future technologies continue to shrink, the ability to subject an integrated circuit to voltages above normal Vdd or temperatures above normal operating temperatures becomes more and more limited. As a result, burn-in times will need to become longer and longer, adding significant cost and cycle time to the burn-in process, to a point that may eventually be prohibitive using current burn-in methods.